From 3192f8a0084f8a6f82ac18e187d9db30e524ff9b Mon Sep 17 00:00:00 2001
From: Jan Breuer <jan.breuer@mobatime.cz>
Date: 周二, 15 8月 2017 00:33:56 +0800
Subject: [PATCH] Merge branch 'jfichtner-OperationStatusRegAdditions'
---
libscpi/inc/scpi/minimal.h | 4 ++
libscpi/inc/scpi/types.h | 1
libscpi/src/ieee488.c | 14 +++++++
libscpi/src/minimal.c | 52 ++++++++++++++++++++++++++
libscpi/test/test_parser.c | 24 ++++++++++++
5 files changed, 95 insertions(+), 0 deletions(-)
diff --git a/libscpi/inc/scpi/minimal.h b/libscpi/inc/scpi/minimal.h
index 77b2abd..31713dd 100644
--- a/libscpi/inc/scpi/minimal.h
+++ b/libscpi/inc/scpi/minimal.h
@@ -52,6 +52,10 @@
scpi_result_t SCPI_StatusQuestionableEventQ(scpi_t * context);
scpi_result_t SCPI_StatusQuestionableEnableQ(scpi_t * context);
scpi_result_t SCPI_StatusQuestionableEnable(scpi_t * context);
+ scpi_result_t SCPI_StatusOperationConditionQ(scpi_t * context);
+ scpi_result_t SCPI_StatusOperationEventQ(scpi_t * context);
+ scpi_result_t SCPI_StatusOperationEnableQ(scpi_t * context);
+ scpi_result_t SCPI_StatusOperationEnable(scpi_t * context);
scpi_result_t SCPI_StatusPreset(scpi_t * context);
diff --git a/libscpi/inc/scpi/types.h b/libscpi/inc/scpi/types.h
index ac826d2..3584936 100644
--- a/libscpi/inc/scpi/types.h
+++ b/libscpi/inc/scpi/types.h
@@ -74,6 +74,7 @@
SCPI_REG_ESE, /* Event Status Enable Register */
SCPI_REG_OPER, /* OPERation Status Register */
SCPI_REG_OPERE, /* OPERation Status Enable Register */
+ SCPI_REG_OPERC, /* OPERation Status Condition Register */
SCPI_REG_QUES, /* QUEStionable status register */
SCPI_REG_QUESE, /* QUEStionable status Enable Register */
diff --git a/libscpi/src/ieee488.c b/libscpi/src/ieee488.c
index 667e9da..6ae5437 100644
--- a/libscpi/src/ieee488.c
+++ b/libscpi/src/ieee488.c
@@ -51,6 +51,17 @@
}
/**
+ * Update latching event register value based on bit transitions from 0 -> 1
+ * in the condition register
+ * @param context
+ * @param condReg - condition register name
+ * @param eventReg - event register name
+ */
+static void regUpdateEvent(scpi_t * context, scpi_reg_val_t oldCondVal, scpi_reg_val_t newCondVal, scpi_reg_name_t eventReg) {
+ SCPI_RegSet(context, eventReg, ((oldCondVal ^ newCondVal) & newCondVal) | SCPI_RegGet(context, eventReg));
+}
+
+/**
* Update STB register according to value and its mask register
* @param context
* @param val value of register
@@ -148,6 +159,9 @@
case SCPI_REG_OPERE:
regUpdate(context, SCPI_REG_OPER);
break;
+ case SCPI_REG_OPERC:
+ regUpdateEvent(context, old_val, val, SCPI_REG_OPER);
+ break;
case SCPI_REG_COUNT:
diff --git a/libscpi/src/minimal.c b/libscpi/src/minimal.c
index 83ecec7..05e351e 100644
--- a/libscpi/src/minimal.c
+++ b/libscpi/src/minimal.c
@@ -139,6 +139,58 @@
}
/**
+ * STATus:OPERation:CONDition?
+ * @param context
+ * @return
+ */
+scpi_result_t SCPI_StatusOperationConditionQ(scpi_t * context) {
+ /* return value */
+ SCPI_ResultInt32(context, SCPI_RegGet(context, SCPI_REG_OPERC));
+
+ return SCPI_RES_OK;
+}
+
+/**
+ * STATus:OPERation[:EVENt]?
+ * @param context
+ * @return
+ */
+scpi_result_t SCPI_StatusOperationEventQ(scpi_t * context) {
+ /* return value */
+ SCPI_ResultInt32(context, SCPI_RegGet(context, SCPI_REG_OPER));
+
+ /* clear register */
+ SCPI_RegSet(context, SCPI_REG_OPER, 0);
+
+ return SCPI_RES_OK;
+}
+
+/**
+ * STATus:OPERation:ENABle?
+ * @param context
+ * @return
+ */
+ scpi_result_t SCPI_StatusOperationEnableQ(scpi_t * context) {
+ /* return value */
+ SCPI_ResultInt32(context, SCPI_RegGet(context, SCPI_REG_OPERE));
+
+ return SCPI_RES_OK;
+}
+
+/**
+ * STATus:OPERation:ENABle
+ * @param context
+ * @return
+ */
+scpi_result_t SCPI_StatusOperationEnable(scpi_t * context) {
+ int32_t new_OPERE;
+ if (SCPI_ParamInt32(context, &new_OPERE, TRUE)) {
+ SCPI_RegSet(context, SCPI_REG_OPERE, (scpi_reg_val_t) new_OPERE);
+ }
+ return SCPI_RES_OK;
+}
+
+/**
* STATus:PRESet
* @param context
* @return
diff --git a/libscpi/test/test_parser.c b/libscpi/test/test_parser.c
index 32773f9..0910731 100644
--- a/libscpi/test/test_parser.c
+++ b/libscpi/test/test_parser.c
@@ -81,6 +81,11 @@
{ .pattern = "STATus:QUEStionable:ENABle", .callback = SCPI_StatusQuestionableEnable,},
{ .pattern = "STATus:QUEStionable:ENABle?", .callback = SCPI_StatusQuestionableEnableQ,},
+ {.pattern = "STATus:OPERation[:EVENt]?", .callback = SCPI_StatusOperationEventQ, },
+ {.pattern = "STATus:OPERation:CONDition?", .callback = SCPI_StatusOperationConditionQ, },
+ {.pattern = "STATus:OPERation:ENABle", .callback = SCPI_StatusOperationEnable, },
+ {.pattern = "STATus:OPERation:ENABle?", .callback = SCPI_StatusOperationEnableQ, },
+
{ .pattern = "STATus:PRESet", .callback = SCPI_StatusPreset,},
{ .pattern = "TEXTfunction?", .callback = text_function,},
@@ -440,6 +445,25 @@
TEST_IEEE4882_REG(SCPI_REG_QUES, 0);
TEST_IEEE4882("STATus:QUEStionable:EVENt?\r\n", "0\r\n");
+ TEST_IEEE4882_REG_SET(SCPI_REG_OPERE, 1);
+ TEST_IEEE4882("STATus:OPERation:ENABle?\r\n", "1\r\n");
+ TEST_IEEE4882_REG(SCPI_REG_OPERE, 1);
+ TEST_IEEE4882("STATus:OPERation:ENABle 2\r\n", "");
+ TEST_IEEE4882_REG(SCPI_REG_OPERE, 2);
+
+ TEST_IEEE4882("STATus:OPERation:CONDition?\r\n", "0\r\n");
+ TEST_IEEE4882_REG_SET(SCPI_REG_OPERC, 1);
+ TEST_IEEE4882("STATus:OPERation:CONDition?\r\n", "1\r\n");
+ TEST_IEEE4882_REG(SCPI_REG_OPERC, 1);
+ TEST_IEEE4882("STATus:OPERation:EVENt?\r\n", "1\r\n");
+ TEST_IEEE4882_REG_SET(SCPI_REG_OPERC, 0);
+ TEST_IEEE4882("STATus:OPERation:CONDition?\r\n", "0\r\n");
+ TEST_IEEE4882_REG(SCPI_REG_OPERC, 0);
+ TEST_IEEE4882_REG_SET(SCPI_REG_OPER, 1);
+ TEST_IEEE4882("STATus:OPERation:EVENt?\r\n", "1\r\n");
+ TEST_IEEE4882_REG(SCPI_REG_OPER, 0);
+ TEST_IEEE4882("STATus:OPERation:EVENt?\r\n", "0\r\n");
+
TEST_IEEE4882("STUB\r\n", "");
TEST_IEEE4882("STUB?\r\n", "0\r\n");
--
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